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diff --git a/devdocs/gcc~13/rx-options.html b/devdocs/gcc~13/rx-options.html new file mode 100644 index 00000000..38aa9c27 --- /dev/null +++ b/devdocs/gcc~13/rx-options.html @@ -0,0 +1,50 @@ +<div class="subsection-level-extent" id="RX-Options"> <div class="nav-panel"> <p> Next: <a href="s_002f390-and-zseries-options" accesskey="n" rel="next">S/390 and zSeries Options</a>, Previous: <a href="rs_002f6000-and-powerpc-options" accesskey="p" rel="prev">IBM RS/6000 and PowerPC Options</a>, Up: <a href="submodel-options" accesskey="u" rel="up">Machine-Dependent Options</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div> <h1 class="subsection" id="RX-Options-1"><span>3.19.43 RX Options<a class="copiable-link" href="#RX-Options-1"> ¶</a></span></h1> <p>These command-line options are defined for RX targets: </p> <dl class="table"> <dt> + <span><code class="code">-m64bit-doubles</code><a class="copiable-link" href="#index-m64bit-doubles-1"> ¶</a></span> +</dt> <dt><code class="code">-m32bit-doubles</code></dt> <dd> +<p>Make the <code class="code">double</code> data type be 64 bits (<samp class="option">-m64bit-doubles</samp>) or 32 bits (<samp class="option">-m32bit-doubles</samp>) in size. The default is <samp class="option">-m32bit-doubles</samp>. <em class="emph">Note</em> RX floating-point hardware only works on 32-bit values, which is why the default is <samp class="option">-m32bit-doubles</samp>. </p> </dd> <dt> + <span><code class="code">-fpu</code><a class="copiable-link" href="#index-fpu"> ¶</a></span> +</dt> <dt><code class="code">-nofpu</code></dt> <dd> +<p>Enables (<samp class="option">-fpu</samp>) or disables (<samp class="option">-nofpu</samp>) the use of RX floating-point hardware. The default is enabled for the RX600 series and disabled for the RX200 series. </p> <p>Floating-point instructions are only generated for 32-bit floating-point values, however, so the FPU hardware is not used for doubles if the <samp class="option">-m64bit-doubles</samp> option is used. </p> <p><em class="emph">Note</em> If the <samp class="option">-fpu</samp> option is enabled then <samp class="option">-funsafe-math-optimizations</samp> is also enabled automatically. This is because the RX FPU instructions are themselves unsafe. </p> </dd> <dt> +<span><code class="code">-mcpu=<var class="var">name</var></code><a class="copiable-link" href="#index-mcpu-11"> ¶</a></span> +</dt> <dd> +<p>Selects the type of RX CPU to be targeted. Currently three types are supported, the generic ‘<samp class="samp">RX600</samp>’ and ‘<samp class="samp">RX200</samp>’ series hardware and the specific ‘<samp class="samp">RX610</samp>’ CPU. The default is ‘<samp class="samp">RX600</samp>’. </p> <p>The only difference between ‘<samp class="samp">RX600</samp>’ and ‘<samp class="samp">RX610</samp>’ is that the ‘<samp class="samp">RX610</samp>’ does not support the <code class="code">MVTIPL</code> instruction. </p> <p>The ‘<samp class="samp">RX200</samp>’ series does not have a hardware floating-point unit and so <samp class="option">-nofpu</samp> is enabled by default when this type is selected. </p> </dd> <dt> + <span><code class="code">-mbig-endian-data</code><a class="copiable-link" href="#index-mbig-endian-data"> ¶</a></span> +</dt> <dt><code class="code">-mlittle-endian-data</code></dt> <dd> +<p>Store data (but not code) in the big-endian format. The default is <samp class="option">-mlittle-endian-data</samp>, i.e. to store data in the little-endian format. </p> </dd> <dt> +<span><code class="code">-msmall-data-limit=<var class="var">N</var></code><a class="copiable-link" href="#index-msmall-data-limit-2"> ¶</a></span> +</dt> <dd> +<p>Specifies the maximum size in bytes of global and static variables which can be placed into the small data area. Using the small data area can lead to smaller and faster code, but the size of area is limited and it is up to the programmer to ensure that the area does not overflow. Also when the small data area is used one of the RX’s registers (usually <code class="code">r13</code>) is reserved for use pointing to this area, so it is no longer available for use by the compiler. This could result in slower and/or larger code if variables are pushed onto the stack instead of being held in this register. </p> <p>Note, common variables (variables that have not been initialized) and constants are not placed into the small data area as they are assigned to other sections in the output executable. </p> <p>The default value is zero, which disables this feature. Note, this feature is not enabled by default with higher optimization levels (<samp class="option">-O2</samp> etc) because of the potentially detrimental effects of reserving a register. It is up to the programmer to experiment and discover whether this feature is of benefit to their program. See the description of the <samp class="option">-mpid</samp> option for a description of how the actual register to hold the small data area pointer is chosen. </p> </dd> <dt> + <span><code class="code">-msim</code><a class="copiable-link" href="#index-msim-8"> ¶</a></span> +</dt> <dt><code class="code">-mno-sim</code></dt> <dd> +<p>Use the simulator runtime. The default is to use the libgloss board-specific runtime. </p> </dd> <dt> + <span><code class="code">-mas100-syntax</code><a class="copiable-link" href="#index-mas100-syntax"> ¶</a></span> +</dt> <dt><code class="code">-mno-as100-syntax</code></dt> <dd> +<p>When generating assembler output use a syntax that is compatible with Renesas’s AS100 assembler. This syntax can also be handled by the GAS assembler, but it has some restrictions so it is not generated by default. </p> </dd> <dt> +<span><code class="code">-mmax-constant-size=<var class="var">N</var></code><a class="copiable-link" href="#index-mmax-constant-size"> ¶</a></span> +</dt> <dd> +<p>Specifies the maximum size, in bytes, of a constant that can be used as an operand in a RX instruction. Although the RX instruction set does allow constants of up to 4 bytes in length to be used in instructions, a longer value equates to a longer instruction. Thus in some circumstances it can be beneficial to restrict the size of constants that are used in instructions. Constants that are too big are instead placed into a constant pool and referenced via register indirection. </p> <p>The value <var class="var">N</var> can be between 0 and 4. A value of 0 (the default) or 4 means that constants of any size are allowed. </p> </dd> <dt> +<span><code class="code">-mrelax</code><a class="copiable-link" href="#index-mrelax-6"> ¶</a></span> +</dt> <dd> +<p>Enable linker relaxation. Linker relaxation is a process whereby the linker attempts to reduce the size of a program by finding shorter versions of various instructions. Disabled by default. </p> </dd> <dt> +<span><code class="code">-mint-register=<var class="var">N</var></code><a class="copiable-link" href="#index-mint-register"> ¶</a></span> +</dt> <dd> +<p>Specify the number of registers to reserve for fast interrupt handler functions. The value <var class="var">N</var> can be between 0 and 4. A value of 1 means that register <code class="code">r13</code> is reserved for the exclusive use of fast interrupt handlers. A value of 2 reserves <code class="code">r13</code> and <code class="code">r12</code>. A value of 3 reserves <code class="code">r13</code>, <code class="code">r12</code> and <code class="code">r11</code>, and a value of 4 reserves <code class="code">r13</code> through <code class="code">r10</code>. A value of 0, the default, does not reserve any registers. </p> </dd> <dt> +<span><code class="code">-msave-acc-in-interrupts</code><a class="copiable-link" href="#index-msave-acc-in-interrupts"> ¶</a></span> +</dt> <dd> +<p>Specifies that interrupt handler functions should preserve the accumulator register. This is only necessary if normal code might use the accumulator register, for example because it performs 64-bit multiplications. The default is to ignore the accumulator as this makes the interrupt handlers faster. </p> </dd> <dt> + <span><code class="code">-mpid</code><a class="copiable-link" href="#index-mpid"> ¶</a></span> +</dt> <dt><code class="code">-mno-pid</code></dt> <dd> +<p>Enables the generation of position independent data. When enabled any access to constant data is done via an offset from a base address held in a register. This allows the location of constant data to be determined at run time without requiring the executable to be relocated, which is a benefit to embedded applications with tight memory constraints. Data that can be modified is not affected by this option. </p> <p>Note, using this feature reserves a register, usually <code class="code">r13</code>, for the constant data base address. This can result in slower and/or larger code, especially in complicated functions. </p> <p>The actual register chosen to hold the constant data base address depends upon whether the <samp class="option">-msmall-data-limit</samp> and/or the <samp class="option">-mint-register</samp> command-line options are enabled. Starting with register <code class="code">r13</code> and proceeding downwards, registers are allocated first to satisfy the requirements of <samp class="option">-mint-register</samp>, then <samp class="option">-mpid</samp> and finally <samp class="option">-msmall-data-limit</samp>. Thus it is possible for the small data area register to be <code class="code">r8</code> if both <samp class="option">-mint-register=4</samp> and <samp class="option">-mpid</samp> are specified on the command line. </p> <p>By default this feature is not enabled. The default can be restored via the <samp class="option">-mno-pid</samp> command-line option. </p> </dd> <dt> + <span><code class="code">-mno-warn-multiple-fast-interrupts</code><a class="copiable-link" href="#index-mno-warn-multiple-fast-interrupts"> ¶</a></span> +</dt> <dt><code class="code">-mwarn-multiple-fast-interrupts</code></dt> <dd> +<p>Prevents GCC from issuing a warning message if it finds more than one fast interrupt handler when it is compiling a file. The default is to issue a warning for each extra fast interrupt handler found, as the RX only supports one such interrupt. </p> </dd> <dt> + <span><code class="code">-mallow-string-insns</code><a class="copiable-link" href="#index-mallow-string-insns"> ¶</a></span> +</dt> <dt><code class="code">-mno-allow-string-insns</code></dt> <dd> +<p>Enables or disables the use of the string manipulation instructions <code class="code">SMOVF</code>, <code class="code">SCMPU</code>, <code class="code">SMOVB</code>, <code class="code">SMOVU</code>, <code class="code">SUNTIL</code> <code class="code">SWHILE</code> and also the <code class="code">RMPA</code> instruction. These instructions may prefetch data, which is not safe to do if accessing an I/O register. (See section 12.2.7 of the RX62N Group User’s Manual for more information). </p> <p>The default is to allow these instructions, but it is not possible for GCC to reliably detect all circumstances where a string instruction might be used to access an I/O register, so their use cannot be disabled automatically. Instead it is reliant upon the programmer to use the <samp class="option">-mno-allow-string-insns</samp> option if their program accesses I/O space. </p> <p>When the instructions are enabled GCC defines the C preprocessor symbol <code class="code">__RX_ALLOW_STRING_INSNS__</code>, otherwise it defines the symbol <code class="code">__RX_DISALLOW_STRING_INSNS__</code>. </p> </dd> <dt> + <span><code class="code">-mjsr</code><a class="copiable-link" href="#index-mjsr"> ¶</a></span> +</dt> <dt><code class="code">-mno-jsr</code></dt> <dd><p>Use only (or not only) <code class="code">JSR</code> instructions to access functions. This option can be used when code size exceeds the range of <code class="code">BSR</code> instructions. Note that <samp class="option">-mno-jsr</samp> does not mean to not use <code class="code">JSR</code> but instead means that any type of branch may be used. </p></dd> </dl> <p><em class="emph">Note:</em> The generic GCC command-line option <samp class="option">-ffixed-<var class="var">reg</var></samp> has special significance to the RX port when used with the <code class="code">interrupt</code> function attribute. This attribute indicates a function intended to process fast interrupts. GCC ensures that it only uses the registers <code class="code">r10</code>, <code class="code">r11</code>, <code class="code">r12</code> and/or <code class="code">r13</code> and only provided that the normal use of the corresponding registers have been restricted via the <samp class="option">-ffixed-<var class="var">reg</var></samp> or <samp class="option">-mint-register</samp> command-line options. </p> </div> <div class="nav-panel"> <p> Next: <a href="s_002f390-and-zseries-options">S/390 and zSeries Options</a>, Previous: <a href="rs_002f6000-and-powerpc-options">IBM RS/6000 and PowerPC Options</a>, Up: <a href="submodel-options">Machine-Dependent Options</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div><div class="_attribution"> + <p class="_attribution-p"> + © Free Software Foundation<br>Licensed under the GNU Free Documentation License, Version 1.3.<br> + <a href="https://gcc.gnu.org/onlinedocs/gcc-13.1.0/gcc/RX-Options.html" class="_attribution-link">https://gcc.gnu.org/onlinedocs/gcc-13.1.0/gcc/RX-Options.html</a> + </p> +</div> |