devdocs/gcc~13/x86-specific-memory-model-extensions-for-transactional-memory.html


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<div class="section-level-extent" id="x86-specific-memory-model-extensions-for-transactional-memory"> <div class="nav-panel"> <p> Next: <a href="object-size-checking" accesskey="n" rel="next">Object Size Checking</a>, Previous: <a href="integer-overflow-builtins" accesskey="p" rel="prev">Built-in Functions to Perform Arithmetic with Overflow Checking</a>, Up: <a href="c-extensions" accesskey="u" rel="up">Extensions to the C Language Family</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div>  <h1 class="section" id="x86-Specific-Memory-Model-Extensions-for-Transactional-Memory"><span>6.57 x86-Specific Memory Model Extensions for Transactional Memory<a class="copiable-link" href="#x86-Specific-Memory-Model-Extensions-for-Transactional-Memory"> ¶</a></span></h1> <p>The x86 architecture supports additional memory ordering flags to mark critical sections for hardware lock elision. These must be specified in addition to an existing memory order to atomic intrinsics. </p> <dl class="table"> <dt><code class="code">__ATOMIC_HLE_ACQUIRE</code></dt> <dd><p>Start lock elision on a lock variable. Memory order must be <code class="code">__ATOMIC_ACQUIRE</code> or stronger. </p></dd> <dt><code class="code">__ATOMIC_HLE_RELEASE</code></dt> <dd><p>End lock elision on a lock variable. Memory order must be <code class="code">__ATOMIC_RELEASE</code> or stronger. </p></dd> </dl> <p>When a lock acquire fails, it is required for good performance to abort the transaction quickly. This can be done with a <code class="code">_mm_pause</code>. </p> <div class="example smallexample"> <pre class="example-preformatted" data-language="cpp">#include &lt;immintrin.h&gt; // For _mm_pause

int lockvar;

/* Acquire lock with lock elision */
while (__atomic_exchange_n(&amp;lockvar, 1, __ATOMIC_ACQUIRE|__ATOMIC_HLE_ACQUIRE))
    _mm_pause(); /* Abort failed transaction */
...
/* Free lock with lock elision */
__atomic_store_n(&amp;lockvar, 0, __ATOMIC_RELEASE|__ATOMIC_HLE_RELEASE);</pre>
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