path: root/devdocs/gcc~13/openrisc-options.html

<div class="subsection-level-extent" id="OpenRISC-Options"> <div class="nav-panel"> <p> Next: <a href="pdp-11-options" accesskey="n" rel="next">PDP-11 Options</a>, Previous: <a href="nvidia-ptx-options" accesskey="p" rel="prev">Nvidia PTX Options</a>, Up: <a href="submodel-options" accesskey="u" rel="up">Machine-Dependent Options</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div>  <h1 class="subsection" id="OpenRISC-Options-1"><span>3.19.36 OpenRISC Options<a class="copiable-link" href="#OpenRISC-Options-1"> ¶</a></span></h1>  <p>These options are defined for OpenRISC: </p> <dl class="table"> <dt>
<span><code class="code">-mboard=<var class="var">name</var></code><a class="copiable-link" href="#index-mboard"> ¶</a></span>
</dt> <dd>
<p>Configure a board specific runtime. This will be passed to the linker for newlib board library linking. The default is <code class="code">or1ksim</code>. </p> </dd> <dt>
<span><code class="code">-mnewlib</code><a class="copiable-link" href="#index-mnewlib"> ¶</a></span>
</dt> <dd>
<p>This option is ignored; it is for compatibility purposes only. This used to select linker and preprocessor options for use with newlib. </p> </dd> <dt>
 <span><code class="code">-msoft-div</code><a class="copiable-link" href="#index-msoft-div"> ¶</a></span>
</dt> <dt><code class="code">-mhard-div</code></dt> <dd>
<p>Select software or hardware divide (<code class="code">l.div</code>, <code class="code">l.divu</code>) instructions. This default is hardware divide. </p> </dd> <dt>
 <span><code class="code">-msoft-mul</code><a class="copiable-link" href="#index-msoft-mul"> ¶</a></span>
</dt> <dt><code class="code">-mhard-mul</code></dt> <dd>
<p>Select software or hardware multiply (<code class="code">l.mul</code>, <code class="code">l.muli</code>) instructions. This default is hardware multiply. </p> </dd> <dt>
 <span><code class="code">-msoft-float</code><a class="copiable-link" href="#index-msoft-float-9"> ¶</a></span>
</dt> <dt><code class="code">-mhard-float</code></dt> <dd>
<p>Select software or hardware for floating point operations. The default is software. </p> </dd> <dt>
<span><code class="code">-mdouble-float</code><a class="copiable-link" href="#index-mdouble-float-3"> ¶</a></span>
</dt> <dd>
<p>When <samp class="option">-mhard-float</samp> is selected, enables generation of double-precision floating point instructions. By default functions from <samp class="file">libgcc</samp> are used to perform double-precision floating point operations. </p> </dd> <dt>
<span><code class="code">-munordered-float</code><a class="copiable-link" href="#index-munordered-float"> ¶</a></span>
</dt> <dd>
<p>When <samp class="option">-mhard-float</samp> is selected, enables generation of unordered floating point compare and set flag (<code class="code">lf.sfun*</code>) instructions. By default functions from <samp class="file">libgcc</samp> are used to perform unordered floating point compare and set flag operations. </p> </dd> <dt>
<span><code class="code">-mcmov</code><a class="copiable-link" href="#index-mcmov-1"> ¶</a></span>
</dt> <dd>
<p>Enable generation of conditional move (<code class="code">l.cmov</code>) instructions. By default the equivalent will be generated using set and branch. </p> </dd> <dt>
<span><code class="code">-mror</code><a class="copiable-link" href="#index-mror"> ¶</a></span>
</dt> <dd>
<p>Enable generation of rotate right (<code class="code">l.ror</code>) instructions. By default functions from <samp class="file">libgcc</samp> are used to perform rotate right operations. </p> </dd> <dt>
<span><code class="code">-mrori</code><a class="copiable-link" href="#index-mrori"> ¶</a></span>
</dt> <dd>
<p>Enable generation of rotate right with immediate (<code class="code">l.rori</code>) instructions. By default functions from <samp class="file">libgcc</samp> are used to perform rotate right with immediate operations. </p> </dd> <dt>
<span><code class="code">-msext</code><a class="copiable-link" href="#index-msext"> ¶</a></span>
</dt> <dd>
<p>Enable generation of sign extension (<code class="code">l.ext*</code>) instructions. By default memory loads are used to perform sign extension. </p> </dd> <dt>
<span><code class="code">-msfimm</code><a class="copiable-link" href="#index-msfimm"> ¶</a></span>
</dt> <dd>
<p>Enable generation of compare and set flag with immediate (<code class="code">l.sf*i</code>) instructions. By default extra instructions will be generated to store the immediate to a register first. </p> </dd> <dt>
<span><code class="code">-mshftimm</code><a class="copiable-link" href="#index-mshftimm"> ¶</a></span>
</dt> <dd>
<p>Enable generation of shift with immediate (<code class="code">l.srai</code>, <code class="code">l.srli</code>, <code class="code">l.slli</code>) instructions. By default extra instructions will be generated to store the immediate to a register first. </p> </dd> <dt>
<span><code class="code">-mcmodel=small</code><a class="copiable-link" href="#index-mcmodel_003dsmall-1"> ¶</a></span>
</dt> <dd>
<p>Generate OpenRISC code for the small model: The GOT is limited to 64k. This is the default model. </p> </dd> <dt>
<span><code class="code">-mcmodel=large</code><a class="copiable-link" href="#index-mcmodel_003dlarge-1"> ¶</a></span>
</dt> <dd>
<p>Generate OpenRISC code for the large model: The GOT may grow up to 4G in size. </p> </dd> </dl> </div>  <div class="nav-panel"> <p> Next: <a href="pdp-11-options">PDP-11 Options</a>, Previous: <a href="nvidia-ptx-options">Nvidia PTX Options</a>, Up: <a href="submodel-options">Machine-Dependent Options</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div><div class="_attribution">
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