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<div class="subsection-level-extent" id="Other-MIPS-Built-in-Functions"> <div class="nav-panel"> <p> Next: <a href="msp430-built-in-functions" accesskey="n" rel="next">MSP430 Built-in Functions</a>, Previous: <a href="mips-simd-architecture-_0028msa_0029-support" accesskey="p" rel="prev">MIPS SIMD Architecture (MSA) Support</a>, Up: <a href="target-builtins" accesskey="u" rel="up">Built-in Functions Specific to Particular Target Machines</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div>  <h1 class="subsection" id="Other-MIPS-Built-in-Functions-1"><span>6.60.19 Other MIPS Built-in Functions<a class="copiable-link" href="#Other-MIPS-Built-in-Functions-1"> ¶</a></span></h1> <p>GCC provides other MIPS-specific built-in functions: </p> <dl class="table"> <dt><code class="code">void __builtin_mips_cache (int <var class="var">op</var>, const volatile void *<var class="var">addr</var>)</code></dt> <dd>
<p>Insert a ‘<samp class="samp">cache</samp>’ instruction with operands <var class="var">op</var> and <var class="var">addr</var>. GCC defines the preprocessor macro <code class="code">___GCC_HAVE_BUILTIN_MIPS_CACHE</code> when this function is available. </p> </dd> <dt><code class="code">unsigned int __builtin_mips_get_fcsr (void)</code></dt> <dt><code class="code">void __builtin_mips_set_fcsr (unsigned int <var class="var">value</var>)</code></dt> <dd>
<p>Get and set the contents of the floating-point control and status register (FPU control register 31). These functions are only available in hard-float code but can be called in both MIPS16 and non-MIPS16 contexts. </p> <p><code class="code">__builtin_mips_set_fcsr</code> can be used to change any bit of the register except the condition codes, which GCC assumes are preserved. </p>
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