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<div class="subsection-level-extent" id="Xtensa-Options"> <div class="nav-panel"> <p> Next: <a href="zseries-options" accesskey="n" rel="next">zSeries Options</a>, Previous: <a href="xstormy16-options" accesskey="p" rel="prev">Xstormy16 Options</a>, Up: <a href="submodel-options" accesskey="u" rel="up">Machine-Dependent Options</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div>  <h1 class="subsection" id="Xtensa-Options-1"><span>3.19.57 Xtensa Options<a class="copiable-link" href="#Xtensa-Options-1"> ¶</a></span></h1>  <p>These options are supported for Xtensa targets: </p> <dl class="table"> <dt>
 <span><code class="code">-mconst16</code><a class="copiable-link" href="#index-mconst16"> ¶</a></span>
</dt> <dt><code class="code">-mno-const16</code></dt> <dd>
<p>Enable or disable use of <code class="code">CONST16</code> instructions for loading constant values. The <code class="code">CONST16</code> instruction is currently not a standard option from Tensilica. When enabled, <code class="code">CONST16</code> instructions are always used in place of the standard <code class="code">L32R</code> instructions. The use of <code class="code">CONST16</code> is enabled by default only if the <code class="code">L32R</code> instruction is not available. </p> </dd> <dt>
 <span><code class="code">-mfused-madd</code><a class="copiable-link" href="#index-mfused-madd-5"> ¶</a></span>
</dt> <dt><code class="code">-mno-fused-madd</code></dt> <dd>
<p>Enable or disable use of fused multiply/add and multiply/subtract instructions in the floating-point option. This has no effect if the floating-point option is not also enabled. Disabling fused multiply/add and multiply/subtract instructions forces the compiler to use separate instructions for the multiply and add/subtract operations. This may be desirable in some cases where strict IEEE 754-compliant results are required: the fused multiply add/subtract instructions do not round the intermediate result, thereby producing results with <em class="emph">more</em> bits of precision than specified by the IEEE standard. Disabling fused multiply add/subtract instructions also ensures that the program output is not sensitive to the compiler’s ability to combine multiply and add/subtract operations. </p> </dd> <dt>
 <span><code class="code">-mserialize-volatile</code><a class="copiable-link" href="#index-mserialize-volatile"> ¶</a></span>
</dt> <dt><code class="code">-mno-serialize-volatile</code></dt> <dd>
<p>When this option is enabled, GCC inserts <code class="code">MEMW</code> instructions before <code class="code">volatile</code> memory references to guarantee sequential consistency. The default is <samp class="option">-mserialize-volatile</samp>. Use <samp class="option">-mno-serialize-volatile</samp> to omit the <code class="code">MEMW</code> instructions. </p> </dd> <dt>
<span><code class="code">-mforce-no-pic</code><a class="copiable-link" href="#index-mforce-no-pic"> ¶</a></span>
</dt> <dd>
<p>For targets, like GNU/Linux, where all user-mode Xtensa code must be position-independent code (PIC), this option disables PIC for compiling kernel code. </p> </dd> <dt>
 <span><code class="code">-mtext-section-literals</code><a class="copiable-link" href="#index-mtext-section-literals"> ¶</a></span>
</dt> <dt><code class="code">-mno-text-section-literals</code></dt> <dd>
<p>These options control the treatment of literal pools. The default is <samp class="option">-mno-text-section-literals</samp>, which places literals in a separate section in the output file. This allows the literal pool to be placed in a data RAM/ROM, and it also allows the linker to combine literal pools from separate object files to remove redundant literals and improve code size. With <samp class="option">-mtext-section-literals</samp>, the literals are interspersed in the text section in order to keep them as close as possible to their references. This may be necessary for large assembly files. Literals for each function are placed right before that function. </p> </dd> <dt>
 <span><code class="code">-mauto-litpools</code><a class="copiable-link" href="#index-mauto-litpools"> ¶</a></span>
</dt> <dt><code class="code">-mno-auto-litpools</code></dt> <dd>
<p>These options control the treatment of literal pools. The default is <samp class="option">-mno-auto-litpools</samp>, which places literals in a separate section in the output file unless <samp class="option">-mtext-section-literals</samp> is used. With <samp class="option">-mauto-litpools</samp> the literals are interspersed in the text section by the assembler. Compiler does not produce explicit <code class="code">.literal</code> directives and loads literals into registers with <code class="code">MOVI</code> instructions instead of <code class="code">L32R</code> to let the assembler do relaxation and place literals as necessary. This option allows assembler to create several literal pools per function and assemble very big functions, which may not be possible with <samp class="option">-mtext-section-literals</samp>. </p> </dd> <dt>
 <span><code class="code">-mtarget-align</code><a class="copiable-link" href="#index-mtarget-align"> ¶</a></span>
</dt> <dt><code class="code">-mno-target-align</code></dt> <dd>
<p>When this option is enabled, GCC instructs the assembler to automatically align instructions to reduce branch penalties at the expense of some code density. The assembler attempts to widen density instructions to align branch targets and the instructions following call instructions. If there are not enough preceding safe density instructions to align a target, no widening is performed. The default is <samp class="option">-mtarget-align</samp>. These options do not affect the treatment of auto-aligned instructions like <code class="code">LOOP</code>, which the assembler always aligns, either by widening density instructions or by inserting NOP instructions. </p> </dd> <dt>
 <span><code class="code">-mlongcalls</code><a class="copiable-link" href="#index-mlongcalls"> ¶</a></span>
</dt> <dt><code class="code">-mno-longcalls</code></dt> <dd>
<p>When this option is enabled, GCC instructs the assembler to translate direct calls to indirect calls unless it can determine that the target of a direct call is in the range allowed by the call instruction. This translation typically occurs for calls to functions in other source files. Specifically, the assembler translates a direct <code class="code">CALL</code> instruction into an <code class="code">L32R</code> followed by a <code class="code">CALLX</code> instruction. The default is <samp class="option">-mno-longcalls</samp>. This option should be used in programs where the call target can potentially be out of range. This option is implemented in the assembler, not the compiler, so the assembly code generated by GCC still shows direct call instructions—look at the disassembled object code to see the actual instructions. Note that the assembler uses an indirect call for every cross-file call, not just those that really are out of range. </p> </dd> <dt>
<span><code class="code">-mabi=<var class="var">name</var></code><a class="copiable-link" href="#index-mabi-7"> ¶</a></span>
</dt> <dd>
<p>Generate code for the specified ABI. Permissible values are: ‘<samp class="samp">call0</samp>’, ‘<samp class="samp">windowed</samp>’. Default ABI is chosen by the Xtensa core configuration. </p> </dd> <dt>
<span><code class="code">-mabi=call0</code><a class="copiable-link" href="#index-mabi_003dcall0"> ¶</a></span>
</dt> <dd>
<p>When this option is enabled function parameters are passed in registers <code class="code">a2</code> through <code class="code">a7</code>, registers <code class="code">a12</code> through <code class="code">a15</code> are caller-saved, and register <code class="code">a15</code> may be used as a frame pointer. When this version of the ABI is enabled the C preprocessor symbol <code class="code">__XTENSA_CALL0_ABI__</code> is defined. </p> </dd> <dt>
<span><code class="code">-mabi=windowed</code><a class="copiable-link" href="#index-mabi_003dwindowed"> ¶</a></span>
</dt> <dd>
<p>When this option is enabled function parameters are passed in registers <code class="code">a10</code> through <code class="code">a15</code>, and called function rotates register window by 8 registers on entry so that its arguments are found in registers <code class="code">a2</code> through <code class="code">a7</code>. Register <code class="code">a7</code> may be used as a frame pointer. Register window is rotated 8 registers back upon return. When this version of the ABI is enabled the C preprocessor symbol <code class="code">__XTENSA_WINDOWED_ABI__</code> is defined. </p> </dd> <dt>
<span><code class="code">-mextra-l32r-costs=<var class="var">n</var></code><a class="copiable-link" href="#index-mextra-l32r-costs"> ¶</a></span>
</dt> <dd><p>Specify an extra cost of instruction RAM/ROM access for <code class="code">L32R</code> instructions, in clock cycles. This affects, when optimizing for speed, whether loading a constant from literal pool using <code class="code">L32R</code> or synthesizing the constant from a small one with a couple of arithmetic instructions. The default value is 0. </p></dd> </dl> </div>  <div class="nav-panel"> <p> Next: <a href="zseries-options">zSeries Options</a>, Previous: <a href="xstormy16-options">Xstormy16 Options</a>, Up: <a href="submodel-options">Machine-Dependent Options</a> [<a href="index#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="indices" title="Index" rel="index">Index</a>]</p> </div><div class="_attribution">
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